forked from luck/tmp_suning_uos_patched
2cec11d871
- Convert from printk() to pr_*(),
- Add missing continuations, to fix user-visible breakage,
- Drop superfluous casts (u64 has been unsigned long long on all
architectures for many years).
On rbtx4927, this restores the kernel output like:
-TX4927 SDRAMC --
- CR0:0000007e00000544
- TR:32800030e
+TX4927 SDRAMC -- CR0:0000007e00000544 TR:32800030e
and:
-PCIC -- PCICLK:
-Internal(33.3MHz)
-
+PCIC -- PCICLK:Internal(33.3MHz)
Fixes: 4bcc595ccd ("printk: reinstate KERN_CONT for printing continuation lines")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14646/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
92 lines
2.5 KiB
C
92 lines
2.5 KiB
C
/*
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* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
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* and RBTX49xx patch from CELF patch archive.
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*
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* Copyright 2001, 2003-2005 MontaVista Software Inc.
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* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
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* (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/tx4927.h>
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int __init tx4927_report_pciclk(void)
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{
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int pciclk = 0;
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pr_info("PCIC --%s PCICLK:",
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(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
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" PCI66" : "");
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if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
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u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
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switch ((unsigned long)ccfg &
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TX4927_CCFG_PCIDIVMODE_MASK) {
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case TX4927_CCFG_PCIDIVMODE_2_5:
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pciclk = txx9_cpu_clock * 2 / 5; break;
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case TX4927_CCFG_PCIDIVMODE_3:
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pciclk = txx9_cpu_clock / 3; break;
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case TX4927_CCFG_PCIDIVMODE_5:
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pciclk = txx9_cpu_clock / 5; break;
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case TX4927_CCFG_PCIDIVMODE_6:
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pciclk = txx9_cpu_clock / 6; break;
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}
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pr_cont("Internal(%u.%uMHz)",
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(pciclk + 50000) / 1000000,
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((pciclk + 50000) / 100000) % 10);
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} else {
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pr_cont("External");
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pciclk = -1;
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}
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pr_cont("\n");
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return pciclk;
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}
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int __init tx4927_pciclk66_setup(void)
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{
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int pciclk;
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/* Assert M66EN */
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tx4927_ccfg_set(TX4927_CCFG_PCI66);
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/* Double PCICLK (if possible) */
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if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
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unsigned int pcidivmode = 0;
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u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
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pcidivmode = (unsigned long)ccfg &
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TX4927_CCFG_PCIDIVMODE_MASK;
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switch (pcidivmode) {
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case TX4927_CCFG_PCIDIVMODE_5:
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case TX4927_CCFG_PCIDIVMODE_2_5:
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pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
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pciclk = txx9_cpu_clock * 2 / 5;
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break;
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case TX4927_CCFG_PCIDIVMODE_6:
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case TX4927_CCFG_PCIDIVMODE_3:
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default:
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pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
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pciclk = txx9_cpu_clock / 3;
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}
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tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
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pcidivmode);
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pr_debug("PCICLK: ccfg:%08lx\n",
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(unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
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} else
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pciclk = -1;
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return pciclk;
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}
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void __init tx4927_setup_pcierr_irq(void)
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{
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if (request_irq(TXX9_IRQ_BASE + TX4927_IR_PCIERR,
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tx4927_pcierr_interrupt,
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0, "PCI error",
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(void *)TX4927_PCIC_REG))
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pr_warn("Failed to request irq for PCIERR\n");
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}
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