forked from luck/tmp_suning_uos_patched
[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
Add and initialise the two VIC (PL192) found on the S3C64XX series CPUs. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal)
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s3c24xx_register_baseclocks(xtal);
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}
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void __init s3c6410_init_irq(void)
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{
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/* VIC0 is missing IRQ7, VIC1 is fully populated. */
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s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
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}
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struct sysdev_class s3c6410_sysclass = {
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.name = "s3c6410-core",
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};
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@ -44,6 +44,7 @@ extern void s3c_init_cpu(unsigned long idcode,
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/* core initialisation functions */
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extern void s3c24xx_init_irq(void);
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extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
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extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
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@ -10,6 +10,7 @@ config PLAT_S3C64XX
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bool
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depends on ARCH_S3C64XX
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select PLAT_S3C
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select ARM_VIC
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default y
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select NO_IOPORT
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select ARCH_REQUIRE_GPIOLIB
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@ -14,3 +14,4 @@ obj- :=
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obj-y += dev-uart.o
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obj-y += cpu.o
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obj-y += irq.o
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@ -24,6 +24,9 @@
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#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET)
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#define S3C_VIC0_BASE S3C_IRQ(0)
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#define S3C_VIC1_BASE S3C_IRQ(32)
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/* UART interrupts, each UART has 4 intterupts per channel so
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* use the space between the ISA and S3C main interrupts. Note, these
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* are not in the same order as the S3C24XX series! */
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@ -15,6 +15,7 @@
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#ifdef CONFIG_CPU_S3C6410
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extern int s3c6410_init(void);
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extern void s3c6410_init_irq(void);
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extern void s3c6410_map_io(void);
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extern void s3c6410_init_clocks(int xtal);
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34
arch/arm/plat-s3c64xx/irq.c
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34
arch/arm/plat-s3c64xx/irq.c
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@ -0,0 +1,34 @@
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/* arch/arm/plat-s3c64xx/irq.c
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX - Interrupt handling
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <asm/hardware/vic.h>
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#include <asm/irq.h>
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#include <mach/map.h>
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#include <plat/cpu.h>
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void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
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{
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printk(KERN_INFO "%s: initialising interrupts\n", __func__);
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/* initialise the pair of VICs */
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vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid);
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vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid);
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}
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