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[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts

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Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Ben Dooks 2008-10-21 14:06:51 +01:00
parent d626aeedc9
commit d9b79fb568
7 changed files with 47 additions and 0 deletions
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6
arch/arm/mach-s3c6410/cpu.c
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@ -58,6 +58,12 @@ void __init s3c6410_init_clocks(int xtal)
s3c24xx_register_baseclocks(xtal); s3c24xx_register_baseclocks(xtal);
} }
void __init s3c6410_init_irq(void)
{
/* VIC0 is missing IRQ7, VIC1 is fully populated. */
s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
}
struct sysdev_class s3c6410_sysclass = { struct sysdev_class s3c6410_sysclass = {
.name = "s3c6410-core", .name = "s3c6410-core",
}; };

1
arch/arm/plat-s3c/include/plat/cpu.h
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@ -44,6 +44,7 @@ extern void s3c_init_cpu(unsigned long idcode,
/* core initialisation functions */ /* core initialisation functions */
extern void s3c24xx_init_irq(void); extern void s3c24xx_init_irq(void);
extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);

1
arch/arm/plat-s3c64xx/Kconfig
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@ -10,6 +10,7 @@ config PLAT_S3C64XX
bool bool
depends on ARCH_S3C64XX depends on ARCH_S3C64XX
select PLAT_S3C select PLAT_S3C
select ARM_VIC
default y default y
select NO_IOPORT select NO_IOPORT
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB

1
arch/arm/plat-s3c64xx/Makefile
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@ -14,3 +14,4 @@ obj- :=
obj-y += dev-uart.o obj-y += dev-uart.o
obj-y += cpu.o obj-y += cpu.o
obj-y += irq.o

3
arch/arm/plat-s3c64xx/include/plat/irqs.h
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@ -24,6 +24,9 @@
#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET)
#define S3C_VIC0_BASE S3C_IRQ(0)
#define S3C_VIC1_BASE S3C_IRQ(32)
/* UART interrupts, each UART has 4 intterupts per channel so /* UART interrupts, each UART has 4 intterupts per channel so
* use the space between the ISA and S3C main interrupts. Note, these * use the space between the ISA and S3C main interrupts. Note, these
* are not in the same order as the S3C24XX series! */ * are not in the same order as the S3C24XX series! */

1
arch/arm/plat-s3c64xx/include/plat/s3c6410.h
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@ -15,6 +15,7 @@
#ifdef CONFIG_CPU_S3C6410 #ifdef CONFIG_CPU_S3C6410
extern int s3c6410_init(void); extern int s3c6410_init(void);
extern void s3c6410_init_irq(void);
extern void s3c6410_map_io(void); extern void s3c6410_map_io(void);
extern void s3c6410_init_clocks(int xtal); extern void s3c6410_init_clocks(int xtal);

34
arch/arm/plat-s3c64xx/irq.c Normal file
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@ -0,0 +1,34 @@
/* arch/arm/plat-s3c64xx/irq.c
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C64XX - Interrupt handling
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/hardware/vic.h>
#include <asm/irq.h>
#include <mach/map.h>
#include <plat/cpu.h>
void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
{
printk(KERN_INFO "%s: initialising interrupts\n", __func__);
/* initialise the pair of VICs */
vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid);
vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid);
}