Commit Graph

264072 Commits

Author SHA1 Message Date
Kumar Gala
37caf9f2a1 powerpc/fsl-booke: Handle L1 D-cache parity error correctly on e500mc
If the L1 D-Cache is in write shadow mode the HW will auto-recover the
error.  However we might still log the error and cause a machine check
(if L1CSR0[CPE] - Cache error checking enable).  We should only treat
the non-write shadow case as non-recoverable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:36:55 -05:00
Liu Yu
09af52f78e powerpc/math_emu/efp: Look for errata handler when type mismatches
We already have cpu a005 errata handler when instruction cannot be
recognized.  Before we lookup the inst, there's type checking, and we also
need to handle it in errata handler when the type checking failed.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:36:47 -05:00
Liu Yu
d5755e6f3a powerpc/math_emu/efp: No need to round if the result is exact
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:36:44 -05:00
Liu Yu
b430abc4d1 powerpc/math_emu/efp: Use pr_debug instead of printk
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:36:37 -05:00
Mingkai Hu
d31337657b powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.c
There's only p2041rdb board for official release, but the p2041 silicon
on the board can be converted to p2040 silicon without XAUI and L2 cache
function, then the board becomes p2040rdb board. so we use the file name
p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also
consistent with the board name under U-Boot.

During the rename we make few other minor changes to the device tree:
* Move USB phy setting into p2041si.dtsi as its SoC not board defined
* Convert PCI clock-frequency to decimal to be more readable

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:32:57 -05:00
Kumar Gala
d70cb31de8 powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dts
The P4080 silicon device tree was using PowerPC,4080 while the other
e500mc based SoCs used PowerPC,e500mc.  Use the core name to be
consistent going forward.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:32:57 -05:00
Dmitry Eremin-Solenikov
66b77a7540 powerpc/mpc8349emitx: mark localbus as compatible with simple-bus
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:32:57 -05:00
Dmitry Eremin-Solenikov
385c056b56 powerpc/85xx: sbc8560 - declare that localbus is compatbile with simple-bus
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:32:57 -05:00
Dmitry Eremin-Solenikov
c88f92a261 powerpc/85xx: ksi8560 - declare that localbus is compatbile with simple-bus
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:32:57 -05:00
Dmitry Eremin-Solenikov
c72fa7df37 powerpc/85xx: sbc8560 - correct compilation if CONFIG_PHYS_ADDR_T_64BIT is set
If CONFIG_PHYS_ADDR_T_64BIT is set, compilation of sbc8560 fails with
the following error:

arch/powerpc/platforms/85xx/sbc8560.c: In function ‘sbc8560_bdrstcr_init’:
arch/powerpc/platforms/85xx/sbc8560.c:286: error: format ‘%x’ expects type ‘unsigned int’, but argument 2 has type ‘resource_size_t’

Fix that by using %pR format instead of just printing the start of
resource.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-06 23:32:57 -05:00
Benjamin Herrenschmidt
7680057cc4 powerpc: Don't try OPAL takeover on old 970 blades
The firmware on old 970 blades supports some kind of takeover called
"TNK takeover" which will crash if we try to probe for OPAL takeover,
so don't do it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-29 17:04:59 +10:00
Carl E. Love
d15f02eb4e powerpc/perf_event: Fix Power6 L1 cache read & write event codes]
The current L1 cache read event code 0x80082 only counts for thread 0. The
event code 0x280030 should be used to count events on thread 0 and 1. The
patch fixes the event code for the L1 cache read.

The current L1 cache write event code 0x80086 only counts for thread 0. The
event code 0x180032 should be used to count events on thread 0 and 1. The
patch fixes the event code for the L1 cache write.

FYI, the documentation lists three event codes for the L1 cache read event
and three event codes for the L1 cache write event.  The event description
for the event codes is as follows:

L1 cache read requests  0x80082  LSU 0 only
L1 cache read requests  0x8008A  LSU 1 only
L1 cache read requests  0x80030  LSU 1 or LSU 0, counter 2 only.

L1 cache store requests 0x80086  LSU 0 only
L1 cache store requests 0x8008E  LSU 1 only
L1 cache store requests 0x80032  LSU 0 or LSU 1, counter 1 only.

There can only be one request from either LSU 0 or 1 active at a time.

Signed-off-by: Carl Love <cel@us.ibm.com>
Acked-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-29 17:04:59 +10:00
Benjamin Herrenschmidt
e69b742a67 powerpc/ptrace: Fix build with gcc 4.6
gcc (rightfully) complains that we are accessing beyond the
end of the fpr array (we do, to access the fpscr).

The only sane thing to do (whether anything in that code can be
called remotely sane is debatable) is to special case fpscr and
handle it as a separate statement.

I initially tried to do it it by making the array access conditional
to index < PT_FPSCR and using a 3rd else leg but for some reason gcc
was unable to understand it and still spewed the warning.

So I ended up with something a tad more intricated but it seems to
build on 32-bit and on 64-bit with and without VSX.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-29 17:02:04 +10:00
Jimi Xenidis
66857b3a9e powerpc: Fix xmon for systems without MSR[RI]
Based on patch by David Gibson <dwg@au1.ibm.com>

xmon has a longstanding bug on systems which are SMP-capable but lack
the MSR[RI] bit.  In these cases, xmon invoked by IPI on secondary
CPUs will not properly keep quiet, but will print stuff, thereby
garbling the primary xmon's output.  This patch fixes it, by ignoring
the RI bit if the processor does not support it.

There's already a version of this for 4xx upstream, which we'll need
to extend to other RI-lacking CPUs at some point.  For now this adds
Book3e processors to the mix.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-29 16:58:22 +10:00
Benjamin Herrenschmidt
bb36c44557 powerpc/pci: Don't configure PCIe settings when PCI_PROBE_ONLY is set
We don't want to configure PCI Express Max Payload Size or
Max Read Request Size on systems that set that flag. The
firmware will have done it for us, and under hypervisors such
as pHyp we don't even see the parent switches and bridges and
thus can make no assumption on what values are safe to use.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-26 14:22:39 +10:00
Thadeu Lima de Souza Cascardo
d12b524f8b powerpc: Reserve iommu page 0
Some devices have a dma-window that starts at the address 0. This allows
DMA addresses to be mapped to this address and returned to drivers as a
valid DMA address. Some drivers may not behave well in this case, since
the address 0 is considered an error or not allocated.

The solution to avoid this kind of error from happening is reserve the
page addressed as 0 so it cannot be allocated for a DMA mapping.

Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-23 10:27:03 +10:00
Paul Mackerras
25c29f9e32 powerpc: Fix hugetlb with CONFIG_PPC_MM_SLICES=y
Commit 41151e77a4 ("powerpc: Hugetlb for BookE") added some
#ifdef CONFIG_MM_SLICES conditionals to hugetlb_get_unmapped_area()
and vma_mmu_pagesize().  Unfortunately this is not the correct config
symbol; it should be CONFIG_PPC_MM_SLICES.  The result is that
attempting to use hugetlbfs on 64-bit Power server processors results
in an infinite stack recursion between get_unmapped_area() and
hugetlb_get_unmapped_area().

This fixes it by changing the #ifdef to use CONFIG_PPC_MM_SLICES
in those functions and also in book3e_hugetlb_preload().

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-23 10:21:33 +10:00
Wolfram Sang
7b72c9f875 powerpc: update 512x-defconfig
Activate all MPC512x related boards. Also enable GPIO-driver, SPI driver
and at25 to test SPI. Enable DEVTMPFS. Bump to 3.1-rc6.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-23 00:20:07 +02:00
Wolfram Sang
c68308dd50 gpio: move mpc8xxx/512x gpio driver to drivers/gpio
Move the driver to the place where it is expected to be nowadays. Also
rename its CONFIG-name to match the rest and adapt the defconfigs.
Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to
the platforms, because this option is per-platform and not per-driver.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-23 00:14:15 +02:00
Timur Tabi
40dc7e8b4a powerpc/5200: enable audio in the defconfig
Audio support for the MPC5200 exists, so enable it by default.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-22 23:24:06 +02:00
Anatolij Gustschin
5d9e6ac843 powerpc/5200: dts: digsy_mtc.dts: enable both MSCAN nodes
We use both MSCAN controllers on this board, so do not disable
them in the device tree.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-22 23:18:33 +02:00
Anatolij Gustschin
1982c09a64 powerpc/5200: dts: digsy_mtc.dts: add timer0 and timer1 gpio properties
timer0 and timer1 pins are used as simple GPIO on this board.
Add gpio-controller and #gpio-cells properties to timer nodes
so that we can control gpio lines using available MPC52xx
GPT driver.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-22 23:14:03 +02:00
Anatolij Gustschin
aa4593f274 powerpc/5200: dts: digsy_mtc.dts: update to add can, pci, serial and spi
Add new nodes to describe more hardware the board is
equipped with:
 - two can nodes for SJA1000 on localbus
 - pci node to support Coral-PA graphics controller
 - serial node for SC28L92 DUART on localbus
 - spi node for MSP430 device

Also correct i2c eeprom node name.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-22 23:13:50 +02:00
Anatolij Gustschin
6cf1d0b806 powerpc/5200: mpc5200b.dtsi: add spi node address- and size-cells properties
Both, #address-cells and #size-cells properties are required
for spi bus node, so add them.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-22 23:13:40 +02:00
Anshuman Khandual
a120db06c3 perf events, powerpc: Add POWER7 stalled-cycles-frontend/backend events
perf events, powerpc: Add POWER7 stalled-cycles-frontend/backend events

Extent the POWER7 PMU driver with definitions for generic front-end and back-end
stall events.

As explained in Ingo's original comment(8f62242246
), the exact definitions of the stall events are very much processor specific as

different things mean different in their respective instruction pipeline. These
two Power7 raw events are the closest approximation to the concept detailed in
Ingo's comment.

[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x100f8, /* GCT_NOSLOT_CYC */
It means cycles when the Global Completion Table has no slots from this thread

[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x4000a,  /* CMPLU_STALL */
It means no groups completed and GCT not empty for this thread

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:12:56 +10:00
Benjamin Herrenschmidt
82ba129bae powerpc/powernv: Handle PCI-X/PCIe reset delay
The firmware doesn't wait after lifting the PCI reset. However it does
timestamp it in the device tree. We use that to ensure we wait long
enough (3s is our current arbitrary setting) from that timestamp to
actually probing the bus.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:12:54 +10:00
Benjamin Herrenschmidt
c1a2562ac5 powerpc/powernv: Implement MSI support for p5ioc2 PCIe
This implements support for MSIs on p5ioc2 PHBs. We only support
MSIs on the PCIe PHBs, not the PCI-X ones as the later hasn't been
properly verified in HW.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:12:44 +10:00
Benjamin Herrenschmidt
61305a96fa powerpc/powernv: Add support for p5ioc2 PCI-X and PCIe
This adds support for PCI-X and PCIe on the p5ioc2 IO hub using
OPAL. This includes allocating & setting up TCE tables and config
space access routines.

This also supports fallbacks via RTAS when OPAL is absent, using
legacy TCE format pre-allocated via the device-tree (BML style)

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:10:04 +10:00
Benjamin Herrenschmidt
ed79ba9e15 powerpc/powernv: Machine check and other system interrupts
OPAL can handle various interrupt for us such as Machine Checks (it
performs all sorts of recovery tasks and passes back control to us with
informations about the error), Hardware Management Interrupts and Softpatch
interrupts.

This wires up the mechanisms and prints out specific informations returned
by HAL when a machine check occurs.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:10:03 +10:00
Benjamin Herrenschmidt
a125e0928c powerpc/powernv: Register and handle OPAL interrupts
We do the minimum which is to "pass" interrupts to HAL, which
makes the console smoother and will allow us to implement
interrupt based completion and console.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:10:01 +10:00
Benjamin Herrenschmidt
5c7c1e9444 powerpc/powernv: Add OPAL ICS backend
OPAL handles HW access to the various ICS or equivalent chips
for us (with the exception of p5ioc2 based HEA which uses a

different backend) similarily to what RTAS does on pSeries.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:59 +10:00
Benjamin Herrenschmidt
628daa8d5a powerpc/powernv: Add RTC and NVRAM support plus RTAS fallbacks
Implements OPAL RTC and NVRAM support and wire all that up to
the powernv platform.

We use RTAS for RTC as a fallback if available. Using RTAS for nvram
is not supported yet, pending some rework/cleanup and generalization
of the pSeries & CHRP code. We also use RTAS fallbacks for power off
and reboot

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:57 +10:00
Benjamin Herrenschmidt
ec27329ffb powerpc/powernv: Hookup reboot and poweroff functions
This calls the respective HAL functions, and spin on hal_poll_event()
to ensure the HAL has a chance to communicate with the FSP to trigger
the reboot or shutdown operation

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:55 +10:00
Benjamin Herrenschmidt
daea1175a9 powerpc/powernv: Support for OPAL console
This adds a udbg and an hvc console backend for supporting a console
using the OPAL console interfaces.

On OPAL v1 we have hvc0 mapped to whatever console the system was
configured for (network or hvsi serial port) via the service
processor.

On OPAL v2 we have hvcN mapped to the Nth console provided by OPAL
which generally corresponds to:

	hvc0 : network console (raw protocol)
	hvc1 : serial port S1 (hvsi)
	hvc2 : serial port S2 (hvsi)

Note: At this point, early debug console only works with OPAL v1
and shouldn't be enabled in a normal kernel.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:54 +10:00
Benjamin Herrenschmidt
6e35d5dac0 powerpc/powernv: Add support for instanciating OPAL v2 from Open Firmware
OPAL v2 is instantiated in a way similar to RTAS using Open Firmware
client interface calls, and the resulting address and entry point are
put in the device-tree

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:52 +10:00
Benjamin Herrenschmidt
14a43e69ed powerpc/powernv: Basic support for OPAL
Add definition of OPAL interfaces along with  the wrappers to call
into OPAL runtime and the early device-tree parsing hook to locate
the OPAL runtime firmware.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:50 +10:00
Benjamin Herrenschmidt
817c21ad9a powerpc/powernv: Get kernel command line accross OPAL takeover
We stash it in boot_command_line which isn't in BSS and so won't
be overwritten. We then use that as a default cmd_line before
we walk the device-tree.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:48 +10:00
Benjamin Herrenschmidt
27f4488872 powerpc/powernv: Add OPAL takeover from PowerVM
On machines supporting the OPAL firmware version 1, the system
is initially booted under pHyp. We then use a special hypercall
to verify if OPAL is available and if it is, we then trigger
a "takeover" which disables pHyp and loads the OPAL runtime
firmware, giving control to the kernel in hypervisor mode.

This patch add the necessary code to detect that the OPAL takeover
capability is present when running under PowerVM (aka pHyp) and
perform said takeover to get hypervisor control of the processor.

To perform the takeover, we must first use RTAS (within Open
Firmware runtime environment) to start all processors & threads,
in order to give control to OPAL on all of them. We then call
the takeover hypercall on everybody, OPAL will re-enter the kernel
main entry point passing it a flat device-tree.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:47 +10:00
Benjamin Herrenschmidt
344eb010b2 powerpc/powernv: Add CPU hotplug support
Unplugged CPU go into NAP mode in a loop until woken up

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 16:09:45 +10:00
Benjamin Herrenschmidt
78b782cb78 of: Change logic to overwrite cmd_line with CONFIG_CMDLINE
We used to overwrite with CONFIG_CMDLINE if we found a chosen
node but failed to get bootargs out of it or they were empty,
unless CONFIG_CMDLINE_FORCE is set.

Instead change that to overwrite if "data" is non empty after
the bootargs check. It allows arch code to have other mechanisms
to retrieve the command line prior to parsing the device-tree.

Note: CONFIG_CMDLINE_FORCE case should ideally be handled elsewhere
as it won't work as it-is if the device-tree has no /chosen node

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: devicetree-discuss@lists-ozlabs.org
CC: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2011-09-20 16:09:34 +10:00
Benjamin Herrenschmidt
55190f8878 powerpc: Add skeleton PowerNV platform
This adds a skeletton for the new Power "Non Virtualized"
platform which will be used by machines supporting running
without an hypervisor, for example in order to run KVM.

These machines will be using a new firmware called OPAL
for which the support will be provided by later patches.

The PowerNV platform is intended to be also usable under
the BML environment used internally for early CPU bringup
which is why the code also supports using RTAS instead of
OPAL in various places.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:25 +10:00
Benjamin Herrenschmidt
e550592e68 powerpc/powernv: Don't clobber r9 in relative_toc()
With OPAL, r8 and r9 will be used to pass the OPAL base and entry
for debugging purposes (those informations are also in the
device-tree). We don't want to clobber those registers that
early.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:24 +10:00
Benjamin Herrenschmidt
781fb7a3e4 powerpc/pci: Call pcie_bus_configure_settings()
This new function is used to properly setup the PCI Express Max Payload Size
(and in some circumstances Max Read Request Size).

Some systems will not operate properly if these aren't set correctly and
the firmware doesn't always do it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:24 +10:00
Benjamin Herrenschmidt
fb82b83970 powerpc/smp: More generic support for "soft hotplug"
This adds more generic support for doing CPU hotplug with a simple
idle loop and no actual reset of the processors. The generic
smp_generic_kick_cpu() does the hotplug bringup trick if the PACA
shows that the CPU has already been started at boot and we provide
an accessor for the CPU state.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:24 +10:00
Benjamin Herrenschmidt
b8bb922c68 powerpc/udbg: Fix Kconfig entry for avoiding 44x early debug with KVM
It was preventing the global early debug selection whenever KVM was enabled
instead of only preventing the 440 specific one.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:24 +10:00
Brian King
ac07a4a57f hvcs: Ensure page aligned partner info buffer
The Power platform requires the partner info buffer to be page aligned
otherwise it will fail the partner info hcall with H_PARAMETER. Switch
from using kmalloc to allocate this buffer to __get_free_page to ensure
page alignment.

Signed-off-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:24 +10:00
Anton Blanchard
8bdafa39a4 powerpc: Fix deadlock in icswx code
The icswx code introduced an A-B B-A deadlock:

     CPU0                    CPU1
     ----                    ----
lock(&anon_vma->mutex);
                             lock(&mm->mmap_sem);
                             lock(&anon_vma->mutex);
lock(&mm->mmap_sem);

Instead of using the mmap_sem to keep mm_users constant, take the
page table spinlock.

Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: <stable@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:23 +10:00
Anton Blanchard
a11940978b powerpc: Fix oops when echoing bad values to /sys/devices/system/memory/probe
If we echo an address the hypervisor doesn't like to
/sys/devices/system/memory/probe we oops the box:

# echo 0x10000000000 > /sys/devices/system/memory/probe

kernel BUG at arch/powerpc/mm/hash_utils_64.c:541!

The backtrace is:

create_section_mapping
arch_add_memory
add_memory
memory_probe_store
sysdev_class_store
sysfs_write_file
vfs_write
SyS_write

In create_section_mapping we BUG if htab_bolt_mapping returned
an error. A better approach is to return an error which will
propagate back to userspace.

Rerunning the test with this patch applied:

# echo 0x10000000000 > /sys/devices/system/memory/probe
-bash: echo: write error: Invalid argument

Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: stable@kernel.org
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:23 +10:00
Anton Blanchard
dfbe93a222 powerpc: Coding style cleanups
While converting code to use for_each_node_by_type I noticed a
number of coding style issues.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:23 +10:00
Anton Blanchard
94db7c5e14 powerpc: Use for_each_node_by_type instead of open coding it
Use for_each_node_by_type instead of open coding it.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20 15:53:23 +10:00